Audrey Landis | Digital Alarm Clock & Timer

Final Clock

FPGA and speaker.

Circuit Diagram

Partial diagram of the implemented circuit, featuring registers to store each digit of the time and mechanisms to convert between 12-hour and 24-hour time.

Digital Alarm Clock & Timer

For ENGS 31: Digital Electronics, a partner and I designed a digital alarm clock and timer at the register level and programmed it on an FPGA using VHDL. Features included a 12-hour and 24-hour clock with automatic conversion, whether in operation or while setting the clock; the ability to set each digit separately, as opposed to minutes and hours grouped; an alarm with both visual and audio alerts; and multiple timers.

While the partner and I split design and programming equally, I did all the test-benching of each component and the design as a whole.

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